Hardware Design Engineer
Hardware Design Engineer
AllSTEM Connections
United States
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Position Title – Hardware Design Engineer 5
Remote position
18 months contract
Hourly Rate -$90 -$110
Top 3 Hard Skills Required 10 + Years of Experience
1. Minimum 10+ years' experience with VPM
2. Minimum 10+ Years's experience with following a up system parallel, which is a language for the library
3. Minimum 10+ Years's experience of experience in UVM library. (UVM is at universal verification)
Job Summary
Summary:
The main function of a hardware engineer is to research, design, develop, test computer or computer-related equipment for commercial, industrial, military, or scientific use. A typical hardware engineer is responsible for the manufacture and installation of computer or computer-related equipment and components.
Responsibilities
In this role you will:
• Define verification strategy, requirements, test environments for IP level verification.
• Create test plans and write tests to provide complete features coverage.
• Own verification for complex IPs, including creating test plans, developing Universal Verification Methodology (UVM) components and environments from scratch, writing test cases, debugging failures to root cause issues, running and maintaining regression suites, and closing coverage.
• Develop and implement technical solutions to complex quality and design challenges.
• Write scoreboards, sequences, constraints, assertions and functional coverage.
• Write make files and scripts for verification infrastructure.
• Apply Agile development methodologies including code reviews, sprint planning, and frequent deployment.
• Lead small teams of verification engineers and mentor engineers.
• Collaborate with teams across sites and geographies.
Qualifications
Required/Minimum Qualifications
• 10+ years of technical engineering experience
o OR bachelor's degree in electrical engineering, Computer Engineering, or related field AND 5+ years of technical engineering experience
o OR master's degree in electrical engineering, Computer Engineering, or related field AND 3+ years of technical engineering experience
o OR Doctorate degree in Electrical Engineering, Computer Engineering, or related field
• 7+ years of Technical Engineering Experience with Universal Verification Methodology (UVM), System Verilog and Verification Fundamentals
• In depth knowledge of verification principles, testbenches, stimulus generation, and UVM based test environments
• Solid understanding of computer architecture
• Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
• Scripting language such as Python or Perl or shell scripts.
• Prior experience with high performance DMA verification
Additional or Preferred Qualifications
• 10+ years of technical engineering experience
o OR bachelor's degree in electrical engineering, Computer Engineering, or related field AND 8+ years of technical engineering experience
o OR master's degree in electrical engineering, Computer Engineering, or related field AND 6+ years of technical engineering experience
o OR Doctorate degree in Electrical Engineering, Computer Engineering, or related field AND 3+ years of technical engineering experience.
• 10+ years of Technical Engineering Experience with Universal Verification Methodology (UVM), System Verilog and Verification Fundamental
• Experienced in test plan development to define test cases, checkers, assertions, and functional coverage points.
• Experience in verification of many designs at unit level.
• Knowledge of verification principles, testbenches, UVM, and coverage.
• Knowledge of system verilog class, constraints, coverage and assertions.
• Proficient communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams.
• Proficient in reading, debugging, and/or designing using Verilog languages
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Seniority level
Mid-Senior level -
Employment type
Temporary -
Job function
Sales and Business Development -
Industries
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